22 July 2021

QUARTERLY ACTIVITY REPORT AND APPENDIX 4C

Highlights for the Quarter ended 30 June 2021:

• Second Platform Lot & Third Non-Platform Lot wafers received
• Analysis of wafers well underway
• Renewed HGST Joint Development Agreement
• 4DS’ 100% owned patent portfolio increased to 31 granted US patents
• No significant impact on 4DS’ operations due to COVID-19
• Added to the MSCI Global Index

15 April 2021

QUARTERLY ACTIVITY REPORT AND APPENDIX 4C

Highlights for the Quarter ended 31 March 2021:

• Positive results from Second Non-Platform Lot
• Commenced production of Second Platform Lot, which remains on schedule
• Results from this Second Platform Lot expected late in Q2 2021
• Finalised 2021 collaboration agreement with imec
• 4DS’ 100% owned patent portfolio increased to 30 granted patents
• No significant impact on 4DS’ operations due to COVID-19

17 March 2021

4DS GRANTED 30th USA PATENT

4DS Memory Limited (ASX:4DS) (4DS) (the Company), having been advised by the Company’s USA patent attorney, is pleased to announce the granting of an additional USA patent bringing the Company’s portfolio of granted USA patents to thirty (30).

Details of the USA patent grant are as follows:

Resistive Memory Device Having An Oxide Barrier Layer - Patent No. 10,950,788.

All granted patents and applications are 100% owned by 4DS having been developed in-house and are free from any royalty and or licensing obligations.

The Company has filed an additional two (2) USA patent applications to protect its stream of internal innovations and to strengthen its intellectual property portfolio in the area of Interface Switching ReRAM for Storage Class Memory near to DRAM.

Chief Executive Officer and Managing Director Dr Guido Arnout stated “The granting of the 30th 4DS patent strengthens an already extensive portfolio of patents for Interface Switching ReRAM. These patents and additional filed applications are strategically important for the commercialisation of 4DS technology going forward.”

1 February 2021

POSITIVE RESULTS FROM SECOND NON-PLATFORM LOT

• Data from the Second Non-Platform Lot demonstrated that the results from First Non-Platform Lotwere repeatable
• Insights from the Second Non-Platform Lot were incorporated into process conditions for Second Platform Lot
• Production of the Second Platform Lot commenced at imec on 27 January 2021
• Results from this Second Platform Lot are expected in Q2 of 2021

Background

On 24 June 2020, 4DS announced the results of its analysis of the Additional Wafers Lot (being the First Non-Platform Lot of 300mm wafers). The First Non-Platform Lot was fabricated with process condition contributions from Western Digital and imec.

The 24 June 2020 announcement stated “it [4DS] has measured the highest speed and endurance in the Additional Wafers Lot that have ever been recorded by the Company:

• The best recorded speed at near DRAM speed exceeds Storage Class Memory requirements without the need for speed crippling error correction;
• Endurance is two to three times better than previously reported. Actual endurance may be significantly higher but is currently not quantified due to available lab time and test equipment capacity; and
• The Company also measured retention and the results remain confidential to the Company and its partners until such time as the upper limits of retention can be more accurately defined.” ...

29 October 2019

Company Update 

22nd Patent Granted in the USA

On 14 August, the Company announced the granting of its 22nd patent in the USA: “ Resistive Memory Device Having a Retention  Layer” . This 22nd patent relates generally to the Company’s in-house developed and fully -owned Interface Switching ReRAM technology and specifically to its operation as high-speed Storage Class Memory (in this regard, see also the Company’s ASX announcement dated 13 June 2017 – “4DS ReRAM Reaches Read Speed Comparable to DRAM ”).

In addition to the 22 granted US A patents, 4DS has filed 8 US A patent applications , and is currently drafting another 3 patent applications to protect its stream of innovations and to strengthen its intellectual property portfolio in the area of Interface Switching ReRAM for Storage Class Memory comparable to DRAM.